With traditional boundaries between embedded and general-purpose computing blurring, both domains increasingly deal with complex, heterogeneous, software-intensive yet tightly constrained systems. This creates new challenges for modeling, synthesis and component design at the intersection of applications and architectures. For modeling of inherently dynamic behavior, simulations continue to play an important role. We first present an abstract, host-compiled modeling approach that provides a fast and accurate alternative to traditional solutions. By navigating tradeoffs in coarse-grain executions, full-system simulations in close to real time with more than 90% accuracy become possible. Models then provide the basis for automated design space exploration as part of a system compiler that can automatically synthesize parallel application models onto optimized hardware/software platforms. Finally, we will discuss results on co-design of novel domain-specific components for future heterogeneous platforms. We specifically explore fundamental tradeoffs between flexibility and specialization, and between error acceptance and energy in the design of high-performance yet low-power processors for linear algebra and signal processing applications.
Andreas Gerstlauer is an Assistant Professor in Electrical and Computer Engineering at The University of Texas at Austin. He received his Ph.D. in Information and Computer Science from the University of California, Irvine (UCI) in 2004. Prior to joining UT Austin in 2008, he was an Assistant Researcher in the Center for Embedded Computer Systems (CECS) at UC Irvine, leading a research group to develop electronic system-level (ESL) design tools. Dr. Gerstlauer is co-author on 3 books and more than 60 conference and journal publications, and his paper on OS modeling was reprinted as one of the most influential contributions in 10 years at DATE. His research interests include system-level design automation, system modeling, design languages and methodologies, and embedded hardware and software synthesis.