Solid State Technology and Devices Seminar: Ultrascale System Interconnects at the end of Moore’s Law

Seminar | September 27 | 1-2 p.m. | Cory Hall, The Hogan Room, 521

 John Shalf, Department Head for Computer Science, Lawrence Berkeley National Lab

 Electrical Engineering and Computer Sciences (EECS)

The tapering of lithography advances that have been associated with Moore’s Law will substantially change requirements for future interconnect architectures for large-scale datacenters and HPC systems. Architectural specialization is creating new datacenter requirements such as emerging accelerator technologies for machine learning workloads and rack disaggregation strategies will push the limits of current interconnect technologies. Whereas photonic technologies are often sold on the basis of higher bandwidth and energy efficiency (e.g. lower picojoules per bit), these emerging workloads and technology trends will shift the emphasis to other metrics such as bandwidth density (as opposed to bandwidth alone) and reduced latency, and performance consistency. Such metrics cannot be accomplished with device improvements alone, but require a systems view of photonics in datacenters.
Taking this systems-view, the path towards realizing next-generation exascale HPC and mega datacenters is increasingly dependent on building scalable interconnects that capture the communication requirements of ultrascale applications. The talk will walk through one of the broadest studies to date of high-end application communication requirements, whose computational methods include: finite-difference, lattice-Boltzmann, particle-in-cell, sparse linear algebra, particle mesh ewald, FFT-based solvers, and numerous commercial workloads from FaceBook and Google. Using derived communication characteristics, has enabled us to build a fit-tree approach for designing network infrastructure that is can be dynamically tailored to application requirements at runtime.

 dadevera@berkeley.edu, 510-642-3214