Dissertation Talk: Modeling of Next-Generation Logic Devices
Seminar | April 21 | 2-4 p.m. | 242 Sutardja Dai Hall
Modeling of semiconductor devices plays an important role in determining which future technologies are most promising for the semiconductor industry as well as optimizing the performance and better understanding the underlying physics of existing devices. This thesis focuses on the design, development, and use of software to study transport in low-dimensional materials and explore the physics of negative capacitance in ferroelectrics.
Quantum transport simulation is used to examine the properties of graphene nanoribbons in geometries that can be fabricated through bottom-up chemical synthesis. The chevron graphene nanoribbon is shown to have an electronic structure analogous to traditional semiconductor superlattices. It is shown how this property could be utilized to create a new type of device, which exhibits both negative differential resistance and steep-slope (< 60 mV/decade) switching for low-power electronics applications. We discuss BerkeleyNano3D, a new quantum transport simulator based on the non-equilibrium Greens function (NEGF) formalism, which is capable of efficient three-dimensional device simulation on large computing clusters.
Finally, the phenomenon of ferroelectric negative capacitance is examined through the lens of phase-field simulations based on the time-dependent Ginzburg-Landau equation. This phenomenon has been previously predicted as a means to enable energy-efficient steep-slope device with minimal modification to existing transistor processes. Simulation results from three-dimensional phase-field modeling provide new insight into the underlying mechanisms for negative capacitance and give far better agreement with experiment than previously studied one-dimensional models.